|Salary:||£32,236 to £39,609|
|Placed On:||3rd December 2018|
|Closes:||18th January 2019|
Closing date: 18 Jan 2019 23:00 (UK time)
Department: Institute for Sensors, Signals and Systems
Duration: 30 months fixed-term
The position will be based in the Institute for Sensors, Signals and Systems (ISSS) at HWU is a leading research institute in the areas of robotics, microsystems, communications, and signal and image processing. ISSS has more than 30 academic staff, 70 RAs and PhD students, all active in internationally recognised research and knowledge transfer. Research focus spans from foundations of computational data science to sensor design, and to their application to surveillance; human behaviour inference; detection and tracking; Lidar range imaging; collaborative robotics; driver assistance via multi-modal sensing; and medical and astronomical imaging. ISSS is part of the ERPE in conjunction with IDCOM and was identified as internationally excellent in REF 2014 – see above. ISSS has significant UKRC and EU grant and fellowship support, leads the EPSRC Robotics and AI ORCA hub and the Edinburgh Centre for Robotics programme and is HWU host for UDRC phase 2.
This Research Associate position provides a unique opportunity to investigate Co-Processor Design by Approximation for Smart Sensors. Specifically the applicant will be asked to design and develop architectures for hybrid multicore and dedicated FPGA circuit designs (e.g. implemented on Virtex 7), that include approximate techniques for linear algebra and optimisation through the stack to maximise throughput and minimise power consumption. Typical application areas include multi-sensor radar networks, optical imaging through complex media, vehicle autonomy and driver assistance.
The project is hosted by ISSS and will work on the University Defence Research Collaboration (UDRC3). This £4m grant, funded by EPSRC and Dstl, delivers “Signal Processing in the Information Age” by developing new techniques to better transform data across many domains into actionable information, and meet the requirements for improved situational awareness, information superiority, and autonomy. Pursuing advancements in scalability, adaptivity, multi-modality, resource management, and machine learning, UDRC3 will develop underpinning technology for future military and homeland security applications. UDRC3 continues a decade-long collaboration between IDCOM and Dstl, and provides context, impact routes, and new avenues for cutting-edge research in this and related projects.
The applicant should have (or be about to obtain) a PhD in Electronic or Computer Engineering or Science or a relevant field, with research experience in FPGA design using HDLs and/or High Level Synthesis (familiarity with design tools such as Vivado), with particular emphasis on low-power design methodologies, multicore processor and embedded programming skills, and a firm knowledge of computer architectures. Experience of signal processing theory and algorithms is desirable but not essential.
Informal enquiries may be made to Professor Andrew Wallace at A.M.Wallace@hw.ac.uk
For application details and further information please go to: https://www.hw.ac.uk/about/careers/jobs/united-kingdom.htm
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