Principal Engineer (692973)

The University has been successful in attracting capital support for the establishment of an Advanced Semiconductor Packaging Line (ASPL). The line is one of a kind as it has been designed to allow for a broad range of present and future devices. Its open access governance model is unique in Europe and very rare elsewhere. The NMIS ASPL requires a Principal Engineer to work in a challenging applied R&D environment to explore and develop disruptive packaging and integration technologies to make next-generation systems lower cost with more energy and packaging efficiency.

The Principal Engineer is a Packaging solution architect and technical authority with in-depth knowledge and understanding of all the various aspects of advanced package development that include design, assembly, testing and validation. You will have direct contributions to technical solutions that integrate multiple disciplines or technologies to develop advanced semiconductor packaging applications. You should have a clear understanding of current and proposed competitive solutions, key performance indicators, and end-user mission objectives as well as an understanding of the interplay between technologies and engineering design.

The Principal Engineer will be required to lead and coordinate a wide range of diverse disciplines as part of an integrated project team, working closely alongside the Project Manager to deliver these tasks on time, quality, and cost. In addition to project delivery, you will also be required to plan projects, estimate resources to budget, lead on the development and submission of CR&D bids, technical proposals, and quotations, working closely with the bid and commercial teams.

Principal Engineer is a technical authority, recognised nationally and internationally in semiconductor packaging with an excellent and broad knowledge of engineering, science and technology with prior experience and more detailed knowledge around advanced packaging design, materials, assembly process, interconnects and testing. You will be expected to provide design expertise on the project, analysis, recommendation of solutions and technical guidance on test and validation activities. You will be expected to take the lead on these activities in the ASPL, based within our new facility close to Glasgow Airport.

Principal Engineer will report to and support the Director of Semiconductor Packaging, deputising as required, and will exemplify the behaviours and values of collaboration, innovation, and trust. You will be closely working alongside the Director of Semiconductor Packaging in developing the future strategy, investment and business planning with special regard to the future technology roadmaps in Advanced Packaging. You should have excellent leadership and team working skills, working collaboratively and cooperatively with colleagues, and should be able to communicate with other team members in an encouraging and supportive way.

To be considered for the role, you will have a degree in relevant engineering/ science (Mech, Materials, Electrical, Physics) discipline with significant relevant experience in microelectronics packaging, alternatively a Masters degree with ample experience or PhD with extensive industry experience. You will have an established national and emerging international reputation for advanced packaging and a sustained and outstanding track record of delivering high quality packaging solutions with clear strategic benefit to the customer and the University.

For informal enquiries, please contact Matt Boyle, Director - Electrification, matt.boyle@strath.ac.uk.

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