PDRA/ Research Fellow in Particle Physics - Grade 7/8 (Depending on Experience)

We are seeking to appoint an ASIC designer to join Liverpool’s silicon sensor R&D programme for future physics experiments, supported by the UK Science and Technology Facilities Council (STFC). You will contribute to the design, implementation, verification and experimental characterisation of advanced integrated circuits for High Voltage CMOS (HV-CMOS) particle-detector ASICs. The major focus of the role will be the development of RadPix, a monolithic pixel ASIC for the upgrade of the LHCb experiment at CERN, as well as for strategic R&D within the Solid State Detectors R&D (DRD3) collaboration. These applications place demanding requirements on radiation tolerance, timing precision, spatial resolution, data rate and power consumption. You will collaborate closely with ASIC designers, physicists and engineers at Liverpool and with partners across the UK and internationally. The role involves prototype design through fabrication, characterisation and system-level demonstrators.

We welcome applications from candidates with a PhD in Experimental Physics, Electronic Engineering, Microelectronics, or a closely related discipline, together with proven expertise in ASIC design in either analogue/mixed-signal or digital domains. Candidates should have an interest in developing expertise in analogue front-end design for detector applications. Experience with monolithic silicon sensor technologies, radiation-tolerant electronics or large-scale detector projects would be advantageous. For appointment at the higher advertised grade, applicants are expected to demonstrate an established research profile and to have made significant contributions to detector development.

The group's activities currently include:

• Design, simulation and characterisation of monolithic High Voltage CMOS pixel ASICs for operation in high-rate and high-radiation environments
• Design and qualification of off-chip electronics
• Commissioning and operation of precision assembly infrastructure.
• Development and implementation of electro-mechanical quality-control and testing procedures for detector validation
• Development of data acquisition (DAQ) systems for silicon tracking detectors
• Integration and testing of complete detectors.

If you are still awaiting your PhD to be awarded you will be appointed at Grade 6, spine point 30.  Upon written confirmation that you have been awarded your PhD, your salary will be increased to Grade 7, spine point 31.

This post is fixed term until 18 May 2029.

Commitment to Diversity

The University of Liverpool is committed to enhancing workforce diversity. We actively seek to attract, develop, and retain colleagues with diverse backgrounds and perspectives. We welcome applications from all genders/gender identities, Black, Asian, or Minority Ethnic backgrounds, individuals living with a disability, and members of the LGBTQIA+ community.

Closing Date: 17 August 2026  23:30

For full details and to apply online, please click on the apply button above. 

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