Research Fellow in Analog Computing for Advanced Communication Systems

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The role

The Institute for Communication Systems (ICS) home of the 5G and 6G Innovation Centre (5GIC/6GIC) is looking to recruit Research Fellow in Analog Computing for Advanced Communication Systems. The successful candidate will be part of the Wireless Systems Lab group and will have the opportunity to work very close with our industrial partners as well as with academic partners all over the world.

The post holder will undertake research into ultra-low-power analog and mixed-signal computing architectures for future communication systems, with particular emphasis on receiver processing and architectures that reduce or remove reliance on conventional high-resolution analog-to-digital conversion.

The research will investigate how signal-processing operations traditionally implemented digitally can be reformulated and realised using analog, mixed-signal and in-memory computing technologies. Particular emphasis will be placed on the co-design of algorithms and hardware, circuit- and system-level modelling, and evaluation of the resulting architectures in terms of communication performance, power consumption, latency, precision and implementation complexity. The post holder will be expected to be able to set, define and work towards achieving targets, disseminate results and document work done.

About you

ICS is the largest academic research institute in Europe specialising in all aspects of ICT (Information and Communication Technologies). It is home to over 200 researchers with expertise in all communication and broadcasting systems and has developed the best in class large scale testbeds for research and innovation and enjoys the state-of-the-art lab and computing facilities.

Established in 2012, 5GIC is the world’s first dedicated centre in researching end-to-end aspects of 5G and works closely with national and international leading academic institutes and key industrial partners. In November 2020, 6GIC was officially launched with parallel research undertaken in both 5G+ and 6G for 2030+.

The post holder must have expertise in the following:

• Strong knowledge and research experience in analogue circuit design, particularly for low-power signal processing, computing or communication applications.
• Experience in circuit-level modelling and simulation, including the ability to evaluate power/energy consumption and relevant circuit non-idealities.
• Experience or strong knowledge of algorithm–hardware co-design, including the mapping of mathematical or signal-processing operations onto practical hardware subject to noise, precision, dynamic-range, variability and implementation constraints.
• Strong analytical, modelling and programming skills, including experience with MATLAB and/or Python, and the ability to communicate research findings effectively in written and oral form.

It would be desirable but not essential for the post holder to also have:

• Experience with in-memory computing architectures, including memristive/ReRAM or other emerging-device technologies.
• Knowledge of signal processing and communication systems, particularly channel estimation, detection, decoding, optimisation or linear algebra.
• A track record of high-quality peer-reviewed publications in analog/mixed-signal circuits, in-memory/neuromorphic computing, signal processing, communications or related areas.

For informal enquiries please contact: k.nikitopoulos@surrey.ac.uk

How to apply

To apply, please submit your application with a CV and Cover Letter online via the University of Surrey jobs portal.

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