| Qualification Type: | PhD |
|---|---|
| Location: | Coventry, University of Warwick, Warwick |
| Funding for: | UK Students |
| Funding amount: | £21,805 |
| Hours: | Full Time |
| Placed On: | 23rd October 2026 |
|---|---|
| Closes: | 1st December 2026 |
Data centres powering modern artificial intelligence workloads currently account for more than 2% of global electricity consumption, a figure projected to rise substantially over the next decade. In hyperscale facilities, around 30% of input electrical energy is lost as heat during power conversion and distribution.
To address the power conversion challenges outlined in the UK’s Clean Power 2030, Solid-State Transformers (SSTs) that combine wide-bandgap power semiconductors and high-frequency magnetics offer the power density, efficiency, and bidirectional power-flow control required for AI data centres, megawatt-scale electric vehicle charging, and renewable-rich distribution networks.
Research Aims & Scope
This PhD project focuses on developing medium-voltage SST cells tailored for hyperscale AI data centres and net-zero grids. You will investigate the core physical challenges of high-frequency power conversion, focusing on designing compact, ultra-efficient magnetic links and mitigating electrical-thermal degradation under repetitive high-dv/dt stresses. Leveraging the supervisory team’s established research in advanced power semiconductors, sensing and gate-driving technologies, your work will combine multi-physics finite-element modelling (ANSYS/COMSOL) with experimental validation in our high-voltage power electronics laboratory, culminating in a scaled hardware prototype demonstrating enhanced efficiency and power density.
The Research Environment
Dr Jiaqi Yan and Prof. Layi Alatise will supervise the student at the University of Warwick, working within our world-class power electronics facilities. This project offers a unique opportunity to master the intersection of power semiconductors and high-voltage engineering, directly contributing to the UK's capability in next-generation energy infrastructure.
Scholarship:
The award will cover the UK tuition fee level, plus a tax-free stipend, currently £21,805, paid at the prevailing UKRI rate for 3.5 years of full-time study. International candidates are welcome to apply, but must be able to cover the difference in the fee levels.
Eligibility:
Essential:
- A first-class or strong upper second-class degree (or equivalent) in Electrical/Electronic Engineering, Physics, or a related discipline.
- Hands-on experience in power electronic devices/systems or high-voltage setups. Solid theoretical foundation in power electronics, power semiconductor devices, or high-voltage engineering.
Desirable: Experience in multi-physics simulation tools (ANSYS, COMSOL), high-speed PCB design, embedded DSP/FPGA control, or other related skills
How to apply:
Interested candidates should submit a full formal application. Guidance and the application form are here: Click the 'Apply' button above.
Candidates must fulfil the University of Warwick entry criteria and obtain an unconditional offer before commencing enrolment. Should your application for admission be accepted, you should be aware that notification of acceptance for the PhD does not constitute an offer of financial support. Successful scholarship candidates will receive a separate official communication from the School of Engineering confirming their award.
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