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Research Assistant/Associate in Design of Next-Generation AI Hardware (Fixed Term)

University of Cambridge - Department of Computer Science and Technology

Location: Cambridge
Salary: £32,546 to £45,413
Hours: Full Time
Contract Type: Fixed-Term/Contract
Placed On: 16th June 2025
Closes: 6th July 2025
Job Ref: NR46280

Department/Location: Department of Computer Science and Technology, West Cambridge 

Fixed-term: The funds for this post are available until 30 September 2027. 

Applications are invited for a full-time Research Assistant/Associate to work on the design and implementation of next-generation AI hardware (ASIC) accelerators. 

The UK's Advanced Research Invention Agency (ARIA) is supporting an ambitious programme of work that aims to reduce the the cost of AI by more than 1000x: https://www.aria.org.uk/opportunity-spaces/nature-computes-better/scaling-compute/ 

The objective of our project, funded within this programme, is to develop a scalable and modular simulation framework. At the lowest level, this will involve the design and characterisation of a novel configurable hardware LLM accelerator. The successful candidate will be able to lead the continued design and implementation of this accelerator, i.e. exploring optimisations at the architectural and microarchitectural levels and pushing the design through the ASIC / EDA tools to generate accurate estimates of performance, power and area (PPA) for inclusion in our simulator framework. Candidates will ideally have worked on complex digital hardware designs and be familiar with standard EDA design tools from Cadence and Synopsys. Familiarity with standard design verification (DV) procedures and continuous integration (CI) setups would be beneficial. Knowledge of machine learning workloads and the design of machine-learning accelerators would be advantageous. Experience focused on novel semiconductor devices or training ML models is not particularly relevant for this role. It should be possible to take someone with extensive experience of using FPGA tools and provide them the necessary training to use the ASIC tools. 

The team at Cambridge consists of three investigators: Prof. Robert Mullins (PI), Prof. Timothy Jones and Dr Rika Antonova, three PhD students and a postdoctoral researcher. The project is led by Dr. Yiren Zhao at Imperial College, who is supported by Prof. George Constantinides and Prof. Wayne Luk. The team also includes Dr. Mai Luo and Prof. Michael O'Boyle from the University of Edinburgh. Overall, there will be great opportunities for collaboration between more than a dozen PhD students and post-doctoral researchers working on this project at Imperial, University of Cambridge and the University of Edinburgh in topics such as accelerator design, simulation, rapid design-space exploration and system-level optimisation. 

Appointment at Research Associate level is dependent on having a PhD. Those who have submitted but not yet received their PhD will be appointed at Research Assistant level, which will be amended to Research Associate once the PhD has been awarded. 

Informal enquiries please contact: Professor Rob Mullins: rdm34@cam.ac.uk 

To apply online for this vacancy and to view further information about the role, please click 'Apply' above.

Please ensure that you upload a covering letter and a CV in the Upload section of the online application. The covering letter should outline how you match the criteria for the post and why you are applying for this role. If you upload any additional documents which have not been requested, we will not be able to consider these as part of your application. 

Please quote reference NR46280 on your application and in any correspondence about this vacancy. 

The University actively supports equality, diversity and inclusion and encourages applications from all sections of society. 

The University has a responsibility to ensure that all employees are eligible to live and work in the UK. 

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